? semiconductor components industries, llc, 2002 august, 2002 rev. 2 1 publication order number: nup4201dr2/d nup4201dr2 low capacitance surface mount tvs for high-speed data interfaces the nup4201dr2 transient voltage suppressor is designed to protect equipment attached to high speed communication lines from esd, eft, and lighting. features: ? so8 package ? peak power 500 watts 8 x 20 s ? esd rating: iec 6100042 (esd) 15 kv (air) 8 kv (contact) iec 6100044 (eft) 40 a (5/50 ns) iec 6100045 (lighting) 23 (8/20 s) ? ul flammability rating of 94v0 typical applications: ? high speed communication line protection ? usb power and data line protection ? video line protection ? base stations ? hdsl, idsl secondary ic side protection ? microcontroller input protection maximum ratings rating symbol value unit peak power dissipation 8 x 20 s @ t a = 25 c (note 1) p pk 500 w junction and storage temperature range t j , t stg 55 to +150 c lead solder temperature maximum 10 seconds duration t l 260 c 1. nonrepetitive current pulse 8 x 20 s exponential decay waveform so8 low capacitance voltage suppressor 500 watts peak power 6 volts p4201 = device code l = location code y = year w = work week marking diagram device package shipping ordering information nup4201dr2 so8 2500/tape & reel p4201 lyw so8 case 751 plastic 1 8 pin configuration and schematic http://onsemi.com i/o 1 1 ref 1 2 ref 1 3 i/o 2 4 8 ref 2 7 i/o 4 6 i/o 3 5 ref 2
nup4201dr2 http://onsemi.com 2 electrical characteristics characteristic symbol min typ max unit reverse breakdown voltage @ i t = 1.0 ma v br 6.0 v reverse leakage current @ v rwm = 5.0 volts i r n/a 10 a maximum clamping voltage @ i pp = 1.0 a, 8 x 20 s v c n/a 9.8 v maximum clamping voltage @ i pp = 10 a, 8 x 20 s v c n/a 12 v between i/o pins and ground @ dc bias = 0 v, 1.0 mhz capacitance 5.0 10 pf between i/o pins and i/o @ dc bias = 0 v, 1.0 mhz capacitance 2.5 5.0 pf electrical characteristics (t a = 25 c unless otherwise noted) unidirectional (circuit tied to pins 1 and 3 or 2 and 3) symbol parameter i pp maximum reverse peak pulse current v c clamping voltage @ i pp v rwm working peak reverse voltage i r maximum reverse leakage current @ v rwm v br breakdown voltage @ i t i t test current v br maximum temperature coefficient of v br i f forward current v f forward voltage @ i f z zt maximum zener impedance @ i zt i zk reverse current z zk maximum zener impedance @ i zk unidirectional tvs i pp i f v i i r i t v rwm v c v br v f
nup4201dr2 http://onsemi.com 3 typical characteristics 100 0 9 figure 1. reverse breakdown versus temperature 50 t, temperature ( c) 100 200 4 1 0 figure 2. reverse leakage versus temperature v z , reverse breakdown (v) 8 7 6 5 4 3 2 1 0 100 50 50 100 t, temperature ( c) 200 50 150 2 3 8 5 6 7 0 150 i r , reverse leakage ( a) figure 3. 8 20 s pulse waveform 100 90 80 70 60 50 40 30 20 10 0 0204060 t, time ( s) % of peak pulse current t p t r pulse width (t p ) is defined as that point where the peak current decay = 8 s peak value i rsm @ 8 s half value i rsm /2 @ 20 s 80 figure 4. clamping voltage versus peak pulse current 35 30 25 20 15 10 5 0 0204060 i pp , peak pulse current (a) 80 v c , clamping voltage (v) 10 30 50 70 90
nup4201dr2 http://onsemi.com 4 applications information the new nup4201dr2 device is a low capacitance tvs diode array designed to protect sensitive electronics such as communications systems, computers, and computer peripherals against damage due to esd conditions or transient voltage conditions. because of its low capacitance array configuration, it can be used in high speed i/o data lines. the integrated design of the nup4201dr2 device offers surge rated, low capacitance steering diodes and a tvs diode integrated in a single package (so8). if a transient condition occurs, the steering diodes will drive the transient condition to the positive polarity of the power supply or to ground. the tvs device protects the power line against overvoltage conditions to avoid damage in any downstream components. nup4201dr2 device's configurations options the nup4201dr2 is able to protect up to four data lines against transient overvoltage conditions by driving them to a fixed reference point for clamping purposes. the steering diodes will be forward biased whenever the voltage on the protected line exceeds the reference voltage (vcc+vf). the diodes will drive the transient current away from the sensitive circuit. data lines are connected at pins 1,4,6 and 7. the negative reference is connected at pins 5 and 8. these pins must be connected directly to ground by using a ground plane to minimize the pcb's ground inductance. it is very important to reduce as much as possible the pcb trace lengths to minimize parasitic inductances. option 1 four data lines protection and power supply protection using vcc as reference. 8 7 6 5 1 2 3 4 i/o 1 i/o 2 i/o 3 i/o 4 v cc for this configuration, connect pins 2 & 3 directly to the positive supply rail (vcc), the data lines are referenced to the supply voltage. the internal tvs diode prevents overvoltage on the supply rail. option 2 four data lines protection with bias and power supply isolation resistor. 8 7 6 5 1 2 3 4 i/o 1 i/o 2 i/o 3 i/o 4 v cc 10 k the nup4201dr2 device can be isolated from the power supply by connecting a series resistor between pins 2 & 3 and vcc. a resistor of 10k is recommended for isolation purposes. the internal tvs and steering diodes remain biased, which provides the advantage of lower capacitance. option 3 four data lines protection using internal tvs diode as reference. 8 7 6 5 1 2 3 4 i/o 1 i/o 2 i/o 3 i/o 4 nc nc in the case of applications in which a positive supply reference is not available or full isolation is required, the internal tvs could be used as the reference, so for this purpose, the pins 2 and 3 are not connected. in this case, the steering diodes will conduct whenever the voltage on the protected line exceeds the working voltage of the tvs plus one diode drop (vc=vf + v tvs ).
nup4201dr2 http://onsemi.com 5 arail to railo protection topology the following figure shows a case when discrete diodes are configured for rail to rail protection on an i/o line: v cc d1 d2 11 12 esd positive esd negative vf + v cc vf upon the above figure, it is possible to observe that if a positive esd condition occurs, the d1 diode will be forward biased while the d2 diode will be biased when a negative esd condition occurs. a valid first approximation of the resulting clamping voltage due to the protection diodes can be made as follows: for positive pulse conditions: vc = vcc + vf for negative pulse conditions: vc = vf it is important to mention that effects of parasitic inductances must be considered for fast rise time transient conditions because the clamping voltage on the protected circuit will be different than in the previous case. a valid approximation of the resulting clamping voltage can be made as show below: for positive pulse conditions: vc = vcc + vf + (l di esd /dt) for negative pulse conditions: vc = vf (l di esd /dt) as shown in the formulas, the clamping voltage (vc) not only depends on the vf of the steering diodes but also in the l di esd /dt factor, so this is why it is very important to have a good board layout to minimize the effects of the parasitic inductances. nevertheless, some disadvantages are still present when discrete diodes are used to suppress esd conditions in arail to railo configuration. if the esd current is too high, it can potentially result in the damage of any components connected to that rail and it is also possible to experience damage in the discrete diodes if their power dissipation capability is exceeded. the nup4201dr2 on semiconductor's device provides a concept named arailclampo which is designed to eliminate the disadvantages of the usage of discrete diodes for esd protection. the railclamp concept is achieved with the integration of the tvs device in together with the steering diodes. d1 d2 d3 d4 d5 d6 d7 d8 0 rail to rail protection with integrated tbs to achieve the railclamp concept during an esd condition, the esd current will be driven to ground through the tvs device, so the resulting clamping voltage on the protected ic will be: vc = v f(railclamp) + v tvs . the clamping voltage of the tvs device is shown as part of the specifications of the nup4201dr2 datasheet. the clamping voltage will depend on the magnitude of the esd current. the steering diodes are fast switching devices with unique forward voltage and low capacitance characteristics.
nup4201dr2 http://onsemi.com 6 typical applications upstream usb port v bus v bus v bus v bus v bus v bus v bus v bus downstream usb port downstream usb port d d+ d d+ gnd gnd d d+ gnd usb controller r t r t r t r t c t c t c t c t nup2201dt1 nup4201dr2 esd protection for usb port t1/e1 tranceiver rtip rring tring ttip r1 r2 r3 r4 r5 t1 t2 nup4201dr2 v cc ti/e1 interface protection
nup4201dr2 http://onsemi.com 7 500 watts peak power transient voltage suppressor surface mount so8 case 75107 issue aa seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751-01 thru 751-06 are obsolete. new standaard is 751-07 a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 x y g m y m 0.25 (0.010) z y m 0.25 (0.010) z s x s m
nup4201dr2 http://onsemi.com 8 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 291 kamimeguro, meguroku, tokyo, japan 1530051 phone : 81357733850 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. nup4201dr2/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
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